Realization of a transceiver circuit based on a newly developed coding scheme

Abstract

The main desirable features of any technologically feasible digital communication system are highlighted. The general problem of synchronization in digital systems is addressed. Some of the available coding schemes currently used in digital communication systems are discussed. The new development of a new coding scheme in which the data is being sent along with the clock, is presented. The scheme which is referred to as the Tri-State Coding Scheme utilizes one half of the bit duration for sending the clock signal while the other half is used for sending the data. Three different signal levels are used for coding binary data. Design of a transceiver circuit, the operation of which is bsed on the newly developed scheme, is carried out. Simple, inexpensive off the shelf components are used for the implementation of the transceiver circuit. Assessment of the operation performance of the transceiver circuit was conducted for different data patterns and different bit rates. A digitally programmable data/word-length generator was developed for that particular purpose. Prior to assessing the performance of the newly developed transceiver circuit it was essential to evaluate the performance of the new data generator itself. This was done and the results of these tests are also given.