Control and Performance Analysis for MMC Submodules Scale-up Methodology for HVDC and Multi-Terminal DC Applications

Abstract

Motivated by economic, technical, and environmental restrictions, improving and renovating the current electrical power grids is a practical solution to meet the significant growth of power demands. The high voltage direct current (HVDC) system, which is based on controllable power electronic converters, is the key technology to improve power transmission capacity and efficiency. Due to the excellent flexibility and functionality of power converters, expanding the power system with multiple energy sources, such as renewable energy, is feasible. The multi-terminal DC (MTDC) transmission grid, which utilizes multiple power converter terminals, improves the stability and the operational availability of terminals. The modular multilevel converter (MMC) is a suitable building block for HVDC transmission systems to interface AC and DC grids. This dissertation investigates the performance and control designs of MMC based MTDC systems for medium voltage (MV) and high voltage (HV) applications. The control structure in the dq synchronous frame is widely implemented for voltage source converter (VSC) controls. In this dissertation, the system-level control issues for VSC-MMC transmission systems are addressed under unbalanced grid voltages. The dq components contain DC and AC components, which eventually result in power ripples under grid faults. A simple feedforward control method for VSCs is presented to eliminate the active power ripples under unbalanced grid voltages. A control method based on feedback loops is also proposed to eliminate power ripple for a resilient performance under unbalanced grid voltages. An extraction method for AC components is proposed to eliminate the phase-error. The dynamic performance of the VSC-MMC based HVDC system with the proposed control methods is investigated under single-line to ground (SLG) faults in the real-time digital simulator (RTDS). The MMC has gained recognition and attention for MV, HV, and high-power applications due to exceptional features such as scalability, modularity, low voltage stress on switches, and excellent harmonic performance. The number of submodules (SMs) per arm of an MMC system can be as high as 512 to achieve desired high DC voltage levels required for HVDC with a very low total harmonics distortion (THD) (e.g., < 0.1%) of the MMC AC side interface voltage. Although the low THD of the MMC output voltage with a high number of SMs is desirable, the MMC control implementation and complexity are also necessary to be considered for the high number of SMs. The MMC control complexity significantly increases as the number of SMs increases. Redesigning the number of SMs in MMCs also becomes quite difficult and may require significant control upgrade, which in turn also needs additional tests and validations. This dissertation proposes an MMC scale-up control methodology applicable for MV and HV applications. The MMC control design methodology is presented for the phase-shifted PWM (PS-PWM) technique and nearest level modulation (NLM) technique with sorting algorithm-based capacitor voltage balancing (CVB) control. The number of SMs can conveniently be increased or reduced without any significant control modifications. The proposed control method and capacitor voltage balancing (CVB) algorithm are implemented in the RTDS and MMC support units based on field-programmable gate array (FPGA) boards. The performance of the proposed MMC control method is investigated for a Point-to-Point (PTP) MMC based HVDC system under various operating conditions. In this dissertation, a submodule fault-tolerant method for MMCs with the scale-up control design with considering redundant SMs is presented. Under abnormal circumstances (e.g., SM fails), the MMC sets operate with unequal numbers of SMs. The MMC operating with unequal numbers of SMs result in unbalanced voltages among sets because of