A Fully Passive Selectorless Memristive Crossbar Array Based on One Capacitor- One ReRAM

Abstract

Contemporary computer systems utilise diverse memory architectures incorporating solid-state drives with components like floating-gate transistors, off-chip DRAM, and on-chip SRAM caches, each having inherent limitations. Researchers strive to develop non-volatile memory that promises faster speeds and reduced energy consumption. Memristors, rooted in resistive switching, demonstrate potential by storing multibit information, offering nonvolatility, rapid programming, and compactness, positioning them as potential substitutes for SRAM and floating-gate transistors. Despite frequent use, ReRAM crossbar arrays encounter challenges like leakage current and voltage uniformity. This thesis introduces an innovative approach by employing a capacitor with ReRAM (1C1R) to create a passive selectorless cell controlled via signal frequency, aiming for higher memory density, faster switching speed, and lower power consumption. The 1C1R configuration shows promise to consume less power consumption and offer faster switching speed than 1T1R, potentially combining SRAM and floating-gate transistor advantages. Furthermore, the capacitor-memristor relationship establishes a voltage-based measure for the memristor state that utilises the voltage of the memristor-capacitor to determine its state, promising a highly mature and low-leakage future process. This thesis also includes a comprehensive comparison between 1T1R and 1C1R, exploring their distinct writing techniques, power consumption, switching speed, memory density, and readout complexity. Moreover, a fully integrated passive selectorless 16x16 1C1R crossbar array was designed and implemented using SkyWater 130nm CMOS technology, showing improved switching speed and reduced power consumption. Furthermore, experimental results were presented as proof of concept for the novel 1C1R memristive structure, implemented using discrete Knowm 16 Dual in-line Package (DIP) memristors and various capacitors, showcasing formation, writing, and reading operations. Apart from the 1C1R research, this thesis incorporates a separate research endeavour (Chapter 8) —an FPGA emulation of a Crystal oscillator circuit utilising a wave digital filter. This independent research ran concurrently with the thesis's 1C1R research.