Migrating VHDL/FPGA design of TUTGNSS baseband processing from an Altera FPGA device to a Xilinx FPGA device
| dc.contributor.advisor | Dr. Yiqun Zhu | |
| dc.contributor.author | Khaled Humaid H Altuwairgi | |
| dc.date | 2015 | |
| dc.date.accessioned | 2022-05-26T16:55:05Z | |
| dc.date.available | 2022-05-26T16:55:05Z | |
| dc.degree.department | Dr. Yiqun Zhu | |
| dc.identifier.other | 29155 | |
| dc.identifier.uri | https://drepo.sdl.edu.sa/handle/20.500.14154/30574 | |
| dc.publisher | Saudi Digital Library | |
| dc.title | Migrating VHDL/FPGA design of TUTGNSS baseband processing from an Altera FPGA device to a Xilinx FPGA device | |
| dc.type | Thesis | |
| sdl.thesis.level | Master | |
| sdl.thesis.source | SACM - United Kingdom |